Inspur and Intel Announce KNL User Migration Program

FRANKFURT, Germany, June 21, 2016 /PRNewswire/ — The ISC16 is currently being held in Frankfurt. During the event, Inspur and Intel announced a user migration program named “KEEP” (Knights Landing Evaluation and Escalation Program) for the Intel® Xeon Phi™ processor (formerly codenamed Knights Landing) that was officially unveiled by Intel during the conference. Both parties will work together to build a open HPC system based on Intel® Xeon Phi™ processor technology. The project is tailored to help an increasing volume of HPC and deep learning users to complete applications testing, migration and optimization for multicore and many core processors. Thor Sewell, director of HPC Marketing and Industry Development at Intel and Mr. Hu Leijun, Vice President of Inspur, were present at the launch event.

The Intel® Xeon Phi™ processor is a groundbreaking new highly-parallel computing engine. Due to its versatility, it can continue to be used as a PCI-based co-processor, or more commonly as a central processing unit. The chip adopts an improved customization of the Intel® Atom Silvermont microarchitecture and 14nm new technology. It possesses a remarkable number of 72 cores and supports 288 threads. Its double precision floating point performance exceeds 3TFlops, and its single precision surpasses 6TFlops. This new Intel processor is regarded by the industry as a revolutionary product in high performance computing and deep learning.

Mr. Hu Leijun, Vice President of Inspur, elaborated on the details of KEEP. The HPC and deep learning users worldwide are welcome to submit their applications and the Intel® Xeon Phi™ processor test migration requirement to Inspur-Intel Parallel Computing Joint Lab. Upon the assessment and review from Joint Lab specialists, the applicants will gain access to certain testing resources. More importantly, the expert team from Joint Lab will offer a deep code optimization scheme based on actual user test results, and help users optimize their performance for multicore and many core processors.

The program is projected to provide a Intel® Xeon Phi™ processor testing systems of nearly 200TFlops in Phase I, and expected to beyond 700TFLops in Phase II, in order to meet the testing and migration assessment requirements of most HPC and deep learning users. In addition, Joint Lab will also provide Intel Parallel Studio 2017 to assist analysis and applications optimization. Joint Lab will work in conjunction with an experienced engineering team to assist users with Intel® Xeon Phi™ processor testing, migration, optimization and other processes.

Inspur also unveiled some real application performance results based on the Intel® Xeon Phi™ processor: Gridding from SKA (Square Kilometers Array telescope), GMRES, a large-scale linear equation solver and finally released the open source Caffe-MPI for Intel® Xeon Phi™ processor, a deep learning parallel computing framework.

The results show that Gridding process speed (million grid points per second) get 14,540 on a single node Intel® Xeon Phi™ processor server with contrast with 2383 on two socket E5 Xeon server. For GMRES with 28 million order linear equation set, the performance on a single Intel® Xeon Phi™ processor is 4.42x faster than a two socket E5 Xeon server.

The Intel® Xeon Phi™ processor demonstrated excellent performance in both traditional scientific computing and emerging deep learning computing. The launch of the Inspur-Intel user migration program KEEP will accelerate the users’ understanding and application of this new computing technology.

SOURCE Inspur Group Co., Ltd.

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